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Lemonergy · Studio block

Battery cycle program

Native rest/CC/CV phase sequencer with repeats, voltage interlocks and taper dwell. Commands use discharge-positive current.

Implementation ID
battery-cycle-program
Reviewed
2026-10-27

Behavior

Runs repeated rest, constant-current and constant-voltage phases. Phase duration, voltage conditions and taper dwell control advancement. A voltage interlock stops the program. Charging commands are negative.

Interface

Battery cycle program interfaceInputs or arguments on the left, observed outputs on the right. Conserving terminals appear below the component. The tables give units and behavior.Battery cycle programStudio blockvoltagecurrenttriggerenablerequestdonephaseelapsedcyclesfault
Original Lemonergy interface view. Lines identify ports; they are not a completed simulation circuit.
Ports and observed outputs
NameDirectionUnitMeaning
voltageinputVMeasured terminal voltage; scalar.
currentinputAMeasured signed current; scalar.
triggerinputtrue / falseStart trigger; scalar.
enableinputtrue / falseEnable; scalar.
requestoutputASigned current request; scalar.
doneoutputtrue / falseProgram complete; scalar.
phaseoutput1Zero-based active phase; scalar.
elapsedoutputsPhase elapsed time (s); scalar.
cyclesoutput1Finished cycles; scalar.
faultoutputtrue / falseVoltage interlock fault; scalar.

Parameters

Defaults are initial model values. Select values for your own model and operating conditions.

Configuration fields
ParameterUnitDefaultMeaning and limits
Sample interval (s)
sampleTimeS		s0.1Positive sample interval. Initialization has zero elapsed time; subsequent accepted samples update memory.
Cycle repetitions
repeats		11Cycle repetitions. This is an editable model input; the default belongs to the synthetic worked example.
Low-voltage interlock (V)
minimumV		V2.5Low-voltage interlock (V). This is an editable model input; the default belongs to the synthetic worked example.
High-voltage interlock (V)
maximumV		V4.3High-voltage interlock (V). This is an editable model input; the default belongs to the synthetic worked example.
Phases [mode, A, V, duration s, cutoff A, dwell s, gain]
steps		See field order[[0, 0, 0, 1, 0, 0, 0], [1, 1, 3, 2, 0, 0, 0], [0, 0, 0, 1, 0, 0, 0]]Each row: mode (0 rest, 1 CC, 2 CV), current (A), voltage (V), duration (s), cutoff magnitude (A), taper dwell (s), CV gain. Signed currents use discharge-positive convention.

Equations and rules

  • mode 0 = rest; mode 1 = constant current; mode 2 = constant voltage
  • phase row = [mode, current A, voltage V, duration s, cutoff A, dwell s, gain]

Worked example

Battery cycle program worked example

Use the defaults below with Measured terminal voltage = 3.8 V, Measured signed current = 1 A, Start trigger = 1 true / false, Enable = 1 true / false. At 0 s, Signed current request is 0 A. Additional checks are listed below.

Open Studio example after release →
Numerical checks for the bundled synthetic example
OutputTime (s)Expected valueUnitAbsolute tolerance
Signed current request
request		00A1e-08
Program complete
done		0falsetrue / false1e-08
Zero-based active phase
phase		0011e-08
Finished cycles
cycles		0011e-08
Zero-based active phase
phase		1110
Program complete
done		4truetrue / false0

Explore the recorded outputs

Battery cycle program recorded example

Battery cycle program / Signed current request
Battery cycle program / Signed current request against timeRecorded synthetic simulation values. Time in seconds; output in A.-0.0800.211.250.52.50.793.751.085ATime (s)
Battery cycle program / Signed current request: 0 A at 0 s

51 actual recorded samples. Lines are visual guides between samples. Synthetic example, not measured cell data.

Download the recorded samples (JSON) · Open this Studio example after release

Use in a workflow

Battery cycle program worked example

Native rest/CC/CV phase sequencer with repeats, voltage interlocks and taper dwell. Commands use discharge-positive current.

  1. Battery cycle program: Runs repeated rest, constant-current and constant-voltage phases. Phase duration, voltage conditions and taper dwell control advancement. A voltage interlock stops the program. Charging commands are negative.
    • Use the parameter values in the block reference.
    • Implementation tested locally; public release pending.
Open Studio example after release

Connected concepts

Limits and interpretation

  • The phase program is a signal controller; actuation and measured response come from the connected plant. Synthetic phase settings do not establish a test standard.
  • The example verifies numerical behavior for synthetic parameters. Cell characterization and validation for an intended use are separate tasks.

Scientific and mathematical references

These sources explain the scientific and mathematical background. The behavior, interface and limits above define the Lemonergy implementation; a citation does not imply every model option in the source is implemented.

  1. Battery Test Manual For Electric Vehicles, Revision 3

    Jon P. Christopherson · Idaho National Laboratory · 2015

    Technical reference · Performance characterization, pulse resistance/power, life testing and reference performance tests; historical 2015 edition.

Implementation sources

This reference follows the public interface and locally verified numerical checks for an upcoming release.

Contract: Lemonergy Studio public contract · Verification record: verification-2026-10-27

  • docs/glossary/native-block-verification.json

This implementation and its workflow uses (JSON) · Knowledge graph (JSON-LD)