Lemonergy · Studio block

Bus creator

Collects typed named fields into a bus, including nested buses.

Behavior

Field names, quantities and nested bus types come from an explicit versioned declaration; no numerical values are changed.

Original Lemonergy interface view. Lines identify ports; they are not a completed simulation circuit.

Ports and observed outputs
Name	Direction	Unit	Meaning
`soc`	input	fraction	soc; real signal.
`bus`	output	1	state; named bus with declared typed fields.

Defaults are initial model values. Select values for your own model and operating conditions.

Configuration fields
Parameter	Unit	Default	Meaning and limits
Bus declaration `bus`	1	state	Explicit bus used by this worked model.

Initial-SOC = 0.5; Updated-SOC = 0.6; Cell-voltage = 3.7. Before at 1 s = 0.5; After at 1 s = 0.6.

Numerical checks for the bundled synthetic example
Output	Time (s)	Expected value	Unit	Absolute tolerance
Before `Before`	1	`0.5`	fraction	1e-09
After `After`	1	`0.6`	fraction	1e-09

Collects typed named fields into a bus, including nested buses.

Bus creator: Field names, quantities and nested bus types come from an explicit versioned declaration; no numerical values are changed.
- Use the block reference for settings and connections.
- Implementation tested locally; public release pending.

Bus declarations must be acyclic, at most 16 levels deep, with at most 4096 leaves.

This software operation is defined by its public contract and worked example; no external research result is claimed.

This reference follows the public interface and locally verified numerical checks for an upcoming release.

Contract: Lemonergy Studio public contract · Verification record: verification-2026-10-27