Lemonergy · Studio block

Bus assignment

Replaces selected bus fields while preserving every other field.

Behavior

Replacement ports inherit the exact declared field types. The original bus value remains unchanged for other consumers.

Original Lemonergy interface view. Lines identify ports; they are not a completed simulation circuit.

Ports and observed outputs
Name	Direction	Unit	Meaning
`bus`	input	1	pack; named bus with declared typed fields.
`state.soc`	input	fraction	Replace state.soc; real signal.
`bus`	output	1	pack; named bus with declared typed fields.

Defaults are initial model values. Select values for your own model and operating conditions.

Configuration fields
Parameter	Unit	Default	Meaning and limits
Bus declaration `bus`	1	pack	Explicit bus used by this worked model.
Replacement field paths `fields`	1	["state.soc"]	Explicit fields used by this worked model.

Initial-SOC = 0.5; Updated-SOC = 0.6; Cell-voltage = 3.7. Before at 1 s = 0.5; After at 1 s = 0.6.

Numerical checks for the bundled synthetic example
Output	Time (s)	Expected value	Unit	Absolute tolerance
Before `Before`	1	`0.5`	fraction	1e-09
After `After`	1	`0.6`	fraction	1e-09

Replaces selected bus fields while preserving every other field.

Bus assignment: Replacement ports inherit the exact declared field types. The original bus value remains unchanged for other consumers.
- Use the block reference for settings and connections.
- Implementation tested locally; public release pending.

A field and one of its descendants cannot be replaced in the same assignment; replacement paths must be distinct.

This software operation is defined by its public contract and worked example; no external research result is claimed.

This reference follows the public interface and locally verified numerical checks for an upcoming release.

Contract: Lemonergy Studio public contract · Verification record: verification-2026-10-27